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Technical Specifications

The Mega-Cart is based on TTL logic and essentially uses the same technology that was available when Vic-20 was in production, during the early 1980s. While the circuit may have been altered for part count reduction, it remains true to design concepts for that period in time. It is a highly reliable, extensively tested, and stable design based on proven fundamentals of electronics engineering.

ROM Storage

All ROM images are stored within two 27C801 (1mb x 8) OTP EPROMs. Early prototype versions of Mega-Cart used the 32 pin DIP UV erasable version of this chip. The PLCC OTP version of the 27C801 chip was used in final prototypes and production units to allow circuit to fit within a standard Vic-20 cartridge case.

32K RAM Expansion

A single 32k x 8 static RAM chip (HM62256) is used to provide ram expansion capability for Mega-Cart. RAM address space co-exists with ROM address space. Device control and bank switching are used enable/disable ROM and RAM, as required. This flexibility allows all known ROM images to run (and auto-start) on Mega-Cart, irrespective of their memory locations and requirements.

3K RAM Expansion

3K of RAM expansion was enabled on Mega-Cart. This is address decoded from an 8K NVRAM chip. It may be disabled, allowing the Vic-20 to start in stock 3,583 BYTES Free mode, for complete compatibility with loading unexpanded cassette games


Non Volatile RAM was added in Mega-Cart #1, during initial project development. This was to allow saving of menu favourites and selected music. MegaCart prototype versions 1 & 2 used a DS1225 chip for this. However this chip has two drawbacks (a) memory retention is only about 10 years before chip needs replacement  (b) It is physically large and its height would not allow the circuit board to fit into standard Vic-20 case.

A NVSRAM chip - STK12C68, was identified as a suitable replacement. This over came the  (a) need to periodically replace NVRAM - STK12C68 has expected lifespan of 100 years for data retention (b) physical height problem.  A 28 DIP version of this chip was used in prototype version 3 & 4. It was then switched to 28 SOIC package for prototype version 5 & 6 and the final production units.


Early prototypes were constructed with point to point wiring techniques, using 30awg wire. Prototypes #3 & #4 were designed using EagleCad software and produced with standard hole through contruction. Prototypes #5 & #6 continued with use of EagleCad design, but with switch to SMT for all components (except for reset switch - which is external to PCB). Final production PCBs include gold plating of 44 pin edgecard connector.